21 October 2014

FPM DRAM (Fast Page Mode DRAM)

FPM DRAM (Fast Page Mode DRAM) is the oldest DRAM models. Problems often arise from the FPM DRAM is the slow transfer speed 50MHz maximum. FPM DRAM (Fast Page Mode Dynamic Random Access Memory) is a bit faster than usual DRAM. While DRAM standards require that the rows and columns that will be sent for each access, FPM works by sending a row address just once for access to memory in many locations close to each other, increase access time. FPM RAM Memory itself is an improved version of its predecessor, the Memory Page Mode, which is now very rarely seen.

Despite its name (Fast Page Mode), FPM but in fact this is the slowest memory technologies used in modern PC. Almost every PC made ​​in the last few years that is designed to use conventional asynchronous RAM FPM will support, and is given the option to use it safely in the technology because it does not require compatibility or support. However, it offers lower performance than other memory technologies. It is also not suitable for high-speed memory of more than 66 MHz bus, because an excessive number of wait states to be added. FPM DRAM typically allows the system to explode as soon as the timing of 5-3-3-3 at 66 MHz.

FPM DRAM (Fast Page Mode DRAM)

DRAM memory that supports paging and burst technique is called Fast Page Mode (FPM) memory. The term comes from the ability to access data memory on the same page to do with less latency. support on the motherboard socket 486 and Pentium Most systems from 1995 and earlier use FPM memory.

Another technique to accelerate the FPM memory is called interleaving. In this design, two separate banks of memory that are used together, alternating access from one to the other as the even and odd bytes. While one is being accessed, the other being precharged, when the row and column addresses being selected. Then, when the first bank in the pair completed the data, the pair finished second bank with latency part of the cycle and is now ready to generate the data. While both the data bank, the first bank is being precharged, select the row and column address of next access. Access is overlap in the two banks to reduce the effects of latency or precharge cycles and allows data retrieval faster overall. The only problem is that to use interleaving, you have to install identical pairs of banks together, doubling the number of SIMM or DIMM is required. This method is popular in the 32-bit wide memory systems to the processor 486 but fell out of favor in the 64-bit Pentiums because of wide width memory. To perform interleaving on a Pentium machine, you will need to install the memory 128 bits at a time, which means four 72-pin SIMM DIMM or two at a time.

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